The present invention relates to digital-to-analog converters and, in particular, to a digital-to-analog converter circuit that combines a resistive ladder network of a conventional type with current-controlled latch memory subcircuits in a configuration that promotes the efficient use of space, power, and circuit elements.
One type of conventional digital-to-analog converter uses an R-2R resistive ladder network in cooperation with a number of current sources that equals the number of bits of a binary word which is to be converted to an analog output voltage. The logic state of each bit of the binary word is stored in a separate latch circuit. Each of the latch circuits drives a separate current source which in response to the logic state of the bit delivers a current signal of a predetermined amount to a corresponding input node of the R-2R resistive ladder network. The analog output voltage is a weighted sum of the signals representing the bits in the binary word.
A digital-to-analog converter circuit of this type suffers from the disadvantage requiring separate circuit elements to form the latch memory circuits and the constant-current sources. This type of circuit uses a number of circuit elements which occupy a relatively large amount of space, for example, on an integrated circuit substrate, and consume significant amounts of electrical power.